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VERIFICATION: IEEE standardizes 'e' language
(Mon, 10 Apr 2006 06:33:41)
IEEE 1149.1 (JTAG) eVC
The JTAG eVC is capable of verifying all compliant TAPs and scan chain architectures, with enhanced automation.
CE-ATA eVC
A complete verification environment capable of verifying both CE-ATA Host or Device designs based on a layered checker model.
IEEE 1500 (SECT) eVC
Verify next generation test infrastructures of multiple embedded cores in an SoC environment.
UART eVC
A universal verification solution for one of the industry's most standard peripheral devices.

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Functional Verification IP
Customer Quotes
IPextreme and Globetech Solutions Announce Availability of Industry’s First Complete IEEE 1149.7 cJTAG IP Solution
“Ease of integration and having a complete solution is critical to the success of any semiconductor IP core. Our close working relationship with Globetech, a leader in design verification and test solutions, will ensure that our customers will have interoperable world class VIP available for integration of our cJTAG SIP into their SoC.”

Rick Tomihiro, VP of Marketing, IPextreme [read more]